armv8: ls1046a: disable SATA ECC in DCSR

This is a workaround to fix SATA CRC error. Once the root cause
is found the ECC disabling will be removed.

Signed-off-by: Shaohui Xie <[email protected]>
Signed-off-by: Gong Qianyu <[email protected]>
Reviewed-by: York Sun <[email protected]>

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index 43c4aa59a1525c45798b6d3619076de908f31e95..5ca721d079c016458f274051b228f802ed44a49a 100644 (file)
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -228,6 +228,10 @@ int sata_init(void)
 {
        struct ccsr_ahci __iomem *ccsr_ahci = (void *)CONFIG_SYS_SATA;
 
+#ifdef CONFIG_LS1046A
+       /* Disable SATA ECC */
+       out_le32((void *)CONFIG_SYS_DCSR_DCFG_ADDR + 0x520, 0x80000000);
+#endif
        out_le32(&ccsr_ahci->ppcfg, AHCI_PORT_PHY_1_CFG);
        out_le32(&ccsr_ahci->pp2c, AHCI_PORT_PHY_2_CFG);
        out_le32(&ccsr_ahci->pp3c, AHCI_PORT_PHY_3_CFG);